Page mode (burst mode) accessing is often used to access one or more entire words from a given row of a dynamic random access memory (DRAM) array during a single address cycle. During a DRAM page mode access (either a read or a write), a row address is presented to the device address port and latched in with a row address strobe (RAS) to select a given row in the array. A column address strobe is next presented to the address port and latched in with a column address strobe (CAS) to select a first column thereby allowing access to a first cell (bit) along the selected row. Column decode circuitry (static or dynamic) then increments from the received column address to generate a sequence of column addresses to adjacent columns, thereby allowing access to a sequence or "page" of cells (bits) from the selected row.
The page (burst) length of currently available DRAMs operating the page (burst) mode is partly limited by the available column address space. In other words, the number of bits which can be accessed as a single page is dependent on the number of memory cells attached to given word line. Once the available memory cells have been exhausted, a complete new address cycle must be initiated, including precharging, the presentation and latching-in of a row address and the presentation and latching-in of a new initial column address. With each new address cycle an access time penalty is paid.
Thus, the need has arisen for circuits, systems and methods for improving the speed and efficiency of page mode (burst mode) accesses to a DRAM device. Further, as discussed further below, such circuits, systems and methods should be applicable to the improvement of the speed and efficiency of bit block transfers. Bit block transfer (BitBLT) is an important performance enhancement technique used in digital data processing applications, and in particular in "windowing" applications. In general, in a bit block transfer ("block move"), an entire block of data (also known as bitmaps) is transferred from a first (source) block of storage locations in display memory to a second (destination) block of storage locations in display memory. In graphics systems BitBLTs can improve operational speed since the data transfers typically remain local in the graphics controller thereby reducing the tasks required to be performed by the CPU. Similarly, entire blocks of data may be copied from a set of source locations in memory to a set of destination locations in memory by a block copy.
There are a number of known techniques for implementing bit block transfers (copies). For example, a block of source locations in memory may be identified by the addresses corresponding to a pair of "corners" of the block (or two pairs of corners if the block is a rectangle); the address of one "corner" defining a starting row and a starting column address, and the address of a second corner defining an ending row and an ending column address. Once the starting and ending addresses for the block are specified, the remaining source addresses can be derived therefrom using counters and associated circuitry. The destination block can similarly be identified. It should be noted that there are other known techniques of identifying a block of storage locations, such as defining a single starting address ("corner") and the size ("dimensions") of the block being moved or copied. To implement the actual transfer, the BitBLT circuitry and software sequence through the source addresses and each word in the identified source block is moved (or copied) from its source address and sent to a corresponding destination address. In essence, typical bit block transfer techniques read data from the source block of memory locations a word or byte at a time and then write that data into the destination block of memory a word or byte at a time. It should also be noted that some BitBLT implementations can perform more sophisticated operations which cross "byte" boundaries in a word.
In windowing display systems, bit block transfers are often used when blocks ("windows") of information are transferred from one position on the display screen to another position on the display screen, such as when a data window is dragged across the screen by a mouse, or a "window" on a screen is "processed" for some specific application. In this case, the bit block transfer circuitry and software move the corresponding pixel data in the frame buffer (display memory) from the address space corresponding to the original position on the display screen to the address space corresponding to the new position on the display screen. The bit block transfer allows pre-existing pixel data to be used to generate data on the display screen thereby eliminating the need for the system CPU to regenerate the same pixel data to define the same image on the screen. Similarly, bit block transfers can be used when blocks of information are being copied on the display screen. In this case, the corresponding pixel data is replicated by the bit block transfer circuitry and software and written into one or more additional address spaces of the frame buffer corresponding to the new areas of the display screen to which the original displayed data is being copied.
In the speed of presently available bit block transferring systems is limited by the fact that such systems move or copy data from one address space to another address space in memory on a byte or word basis. Thus, the need has arisen for improved circuits, systems and methods for implementing bit block transfers. In particular, such methods, systems and circuits should be applicable to the movement and/or copying of pixel data within the frame buffer of a display system.